Optimizing static power dissipation by functional units in superscalar processors
Document Type
Conference Proceeding
Publication Date
3-28-2002
Department
Department of Computer Science
Abstract
We present a novel approach which combines compiler, instruction set, and microarchitecture support to turn off functional units that are idle for long periods of time for reducing static power dissipation by idle functional units using power gating [2],[9]. The compiler identifies program regions in which functional units are expected to be idle and communicates this information to the hardware by issuing directives for turning units off at entry points of idle regions and directives for turning them back on at exits from such regions. The microarchitecture is designed to treat the compiler directives as hints ignoring a pair of off and on directives if they are too close together. The results of experiments show that some of the functional units can be kept off for over 90% of the time at the cost of minimal performance degradation of under 1%.
Publication Title
International Conference on Compiler Construction
Recommended Citation
Rele, S.,
Pande, S.,
Onder, S.,
&
Gupta, R.
(2002).
Optimizing static power dissipation by functional units in superscalar processors.
International Conference on Compiler Construction, 261-275.
http://doi.org/10.1007/3-540-45937-5_19
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/893
Publisher's Statement
© Springer-Verlag Berlin Heidelberg 2002. Publisher’s version of record: https://doi.org/10.1007/3-540-45937-5_19