Resource management for improving soft-error and lifetime reliability of real-time MPSoCs

Document Type

Article

Publication Date

11-29-2018

Department

Department of Electrical and Computer Engineering

Abstract

Multiprocessor system-on-chip (MPSoC) has been widely used in many real-time embedded systems where both soft-error reliability (SER) and lifetime reliability (LTR) are key concerns. Many existing works have investigated them, but they focus either on handling one of the two reliability concerns or on improving one type of reliability under the constraint of the other. These techniques are thus not applicable to maximize SER and LTR simultaneously, which is highly desired in some real-world applications. In this paper, we study the joint optimization of SER and LTR for real-time MPSoCs. We propose a novel static task scheduling algorithm to simultaneously maximize SER and LTR for real-time homogeneous MPSoC systems under the constraints of deadline, energy budget, and task precedence. Specifically, we develop a new solution representation scheme and two evolutionary operators that are closely integrated with two popular multiobjective evolutionary optimization frameworks, namely NSGAII and SPEA2. Extensive experimental results on standard benchmarks and synthetic applications show the efficacy of our scheme. More specifically, our scheme can achieve significantly better solutions (i.e., LTR-SER tradeoff fronts) with remarkably higher hypervolume and can be dozens or even hundreds of times faster than the state-of-the-art algorithms. The results also demonstrate that our scheme can be applied to heterogeneous MPSoC systems and is effective in improving reliability for heterogeneous MPSoC systems.

Publication Title

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

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