Timing driven buffer insertion for carbon nanotube interconnects
Document Type
Book Chapter
Publication Date
4-2016
Department
Department of Electrical and Computer Engineering; Center for Cyber-Physical Systems
Abstract
In the nanoscale technology, both the device and interconnect performances affect the overall performance of the integrated circuits and systems in which they are used. So, it is quite natural to explore various solutions for devices as well as interconnects to mitigate the challenges of technology scaling and meet high-speed demand. This chapter discusses the use of carbon nanotubes (CNTs) as a potential high-speed high-performance interconnect as compared to the metal interconnects.
Publication Title
Nano-CMOS and Post-CMOS Electronics: Devices and Modelling
Recommended Citation
Liu, L.,
Zhou, Y.,
&
Hu, S.
(2016).
Timing driven buffer insertion for carbon nanotube interconnects.
Nano-CMOS and Post-CMOS Electronics: Devices and Modelling.
http://doi.org/10.1049/PBCS029E_ch10
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/778
Publisher's Statement
Publisher's version of record: https://doi.org/10.1049/PBCS029E_ch10