Prediction in dynamic SDRAM controller policies
Document Type
Conference Proceeding
Publication Date
11-2-2009
Department
Department of Electrical and Computer Engineering
Abstract
Memory access latency can limit microcontroller system performance. SDRAM access control policies impact latency through SDRAM device state. It is shown that execution time can be reduced by using a state machine which predicts, for each access, the policy which will minimize latency. Two-level dynamic predictors are incorporated into the SDRAM controller. A range of organizations for dynamic predictors are described, and the performance improvements predicted by simulation are compared using execution time and prediction accuracy as metrics. Results show that predictive SDRAM controllers, reduce execution time by 1.6% to 17% over static access control policies. The prediction accuracy of the best predictor results in 93% prediction accuracy, with 87% accuracy for OP state preferred accesses, and 96% for CPA state preferred accesses. Results show that execution time is strongly correlated to the prediction accuracy of OP, suggesting directions for future predictor development.
Publication Title
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ISBN
978-3-642-03138-0
Recommended Citation
Xu, Y.,
Agarwal, A.,
&
Davis, B.
(2009).
Prediction in dynamic SDRAM controller policies.
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics),
5657 LNCS, 128-138.
http://doi.org/10.1007/978-3-642-03138-0_14
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/4174