Low energy bus design with error tolerant coding
Document Type
Article
Publication Date
6-1-2017
Abstract
Copyright © 2017 American Scientific Publishers. All rights reserved. Energy, delay and noise immunity are three major design matrices in the design of computer bus. This paper proposes three different coding schemes to optimize the bus performance. We present the advantage of each coding scheme and show that how they can be used in different scenarios. When compared with an uncoded scheme, we show that using the proposed scheme we can achieve an energy saving of up to 56%, a delay saving of up to 24%. We also analyze the noise error behavior of each proposed scheme.
Publication Title
Journal of Low Power Electronics
Recommended Citation
Chen, G.,
&
Nooshaabdi, S.
(2017).
Low energy bus design with error tolerant coding.
Journal of Low Power Electronics,
13(2), 205-219.
http://doi.org/10.1166/jolpe.2017.1477
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/12748