JLS/JLSCircuitTester: A comprehensive logic design and simulation tool
Document Type
Conference Proceeding
Publication Date
12-1-2008
Abstract
JLS and JLSCircuitTester are logic design, simulation and testing tools that meet the needs of instructors and students in logic design and computer organization courses. They were designed and implemented by instructors of such courses expressly to lecture with, to do student projects, and to subsequently grade those assignments. They are free, portable, easy to install and easy to learn and use, yet powerful enough to create and test circuits ranging from simple collections of gates to complete CPUs. They come with on-line tutorials, help, and pre-made circuits taken directly from the pages of several commonly used computer organization textbooks. Copyright 2008 ACM.
Publication Title
Koli Calling 2008 - 8th International Conference on Computing Education Research
Recommended Citation
Poplawski, D.,
&
Kurmas, Z.
(2008).
JLS/JLSCircuitTester: A comprehensive logic design and simulation tool.
Koli Calling 2008 - 8th International Conference on Computing Education Research, 105-108.
http://doi.org/10.1145/1595356.1595377
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/12498