Instruction based memory distance analysis and its application to optimization
Document Type
Conference Proceeding
Publication Date
12-1-2005
Abstract
Feedback-directed Optimization has become an increasingly important tool in designing and building optimizing compilers as it provides a means to analyze complex program behavior that is not possible using traditional static analysis. Feedback-directed optimization offers the compiler opportunities to analyze and optimize the memory behavior of programs even when traditional array-based analysis is not applicable. As a result, bothfloating-point and integer programs can benefit from memory hierarchy optimization. In this paper, we examine the notion of memory distance as it is applied to the instruction space of a program, and to feedback-directed optimization. Memory distance is defined as a dynamic quantifiable distance in terms of memory references between two accesses to the same memory location. We use memory distance to predict the miss rates of instructions in a program. Using the miss rates, we then identifi the program's critical instructions - the set of high miss instructions whose cumulative misses account for 95% of the L2 cache misses in the program - in both integer and floating-pointpmgrams. Our experiments show that memory-distance analysis can effectively identifi critical instructions in both integer and floating-point programs. Additionally, we apply memory-distance analysis to memory disambiguation in out-of-order issue processors, using those distances to determine when a load may be speculated ahead of a preceding store. Our experiments show that memory-distance-based disambiguation on average achieves within 5-10% of the performance gain of the store set technique which requires a hardware table.
Publication Title
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
Recommended Citation
Fang, C.,
Carr, S.,
Onder, S.,
&
Wang, Z.
(2005).
Instruction based memory distance analysis and its application to optimization.
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT,
2005, 27-37.
http://doi.org/10.1109/PACT.2005.26
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/10852