Design and simulation of logic circuits with hybrid architectures of single electron transistors and conventional devices
Document Type
Conference Proceeding
Publication Date
12-1-2006
Abstract
Single electron transistor is a nanoelectronic three terminal device. It provides current conduction characteristics comparable to a MOSFET. In this paper, we have designed and simulated logic circuit architectures with a combination of SET and conventional devices such as MOSFETs and comparators. The performances of these hybrid architectures and their advantages and disadvantages with SET standalone circuits have also been studied. © 2006 IEEE.
Publication Title
2006 1st International Conference on Nano-Networks and Workshops, Nano-Net
Recommended Citation
Venkataratnam, A.,
&
Goel, A.
(2006).
Design and simulation of logic circuits with hybrid architectures of single electron transistors and conventional devices.
2006 1st International Conference on Nano-Networks and Workshops, Nano-Net.
http://doi.org/10.1109/NANONET.2006.346218
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/10835