Fast static analysis of power grids: Algorithms and implementations
Document Type
Conference Proceeding
Publication Date
12-1-2011
Abstract
Large VLSI on-chip power delivery networks (PDN) are challenging to analyze due to sheer network complexity. In this paper, three power grid solvers developed in our group: a direct solver using Cholesky decomposition, a GPU-based multigrid preconditioning solver, and a partitioning-based solver using spatial locality, are reviewed. Following the requirements of TAU 2011 Power Grid Simulation Contest, single-threaded versions of these solvers are implemented and their performances are evaluated in terms of runtime, memory, maximum error and average error. The experimental results show that for the published IBM power grid benchmarks, the direct solver has the best overall performance among the three. © 2011 IEEE.
Publication Title
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
Recommended Citation
Zeng, Z.,
Xu, T.,
Feng, Z.,
&
Li, P.
(2011).
Fast static analysis of power grids: Algorithms and implementations.
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, 488-493.
http://doi.org/10.1109/ICCAD.2011.6105373
Retrieved from: https://digitalcommons.mtu.edu/michigantech-p/10556