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Date of Award
Campus Access Master's Thesis
Master of Science in Electrical Engineering (MS)
Administrative Home Department
Department of Electrical and Computer Engineering
Committee Member 1
Daniel R. Fuhrmann
Committee Member 2
This thesis compares the performance of the Sigma Delta Analog to Digital Converter (ΣΔADC) and the Nonuniform Sampling Analog to Digital Converter (NUSADC) in terms of their achieved Signal to Quantization Noise Ratio (SQNR) and the computational complexity. Relaxation of the performance requirements of an Anti-Aliasing Filter (AAF) preceding an ADC can be achieved with oversampling and nonuniform sampling of the input signal, which is implemented in both the ΣΔADC and the NUSADC through different means. The goal of this thesis is to study these two ADCs, which can relax the requirements of AAF and compare their performance. Both ADCs are simulated using MATLAB R2015a.
For the NUSADC, 4-bit and 7-bit voltage crossing levels are used with time resolution of 10 ps and for the ΣΔADC, first- and second-order modulators with single-bit quantizer are used. The NUSADC produces nonuniform samples (in time) while the ΣΔADC produces uniform samples. The NUSADC uses an additive “dither signal” to force threshold crossing events and achieve a predictable average sampling rate. The average rate of nonuniform samples for the NUSADC is calculated for both 4-bit and 7-bit voltage crossing levels and the equivalent sampling frequency is used for the ΣΔADC. In this way we are able to compare these two architectures using equivalent sampling frequencies.
It is found that the first-order ΣΔADC has inferior performance as compared to the NUSADC, while the second-order ΣΔADC can achieve equivalent SQNR values. The computational complexity of both ADCs was calculated and the results show that the second-order ΣΔADC achieved SQNR nearly equal to that of the NUSADC with less computational cost. This is because there are no multiplications needed in Cascaded Integrator-Comb (CIC) filtering used in downsampling of ΣΔADC signal output, while in the case of the NUSADC there are two interpolations required: one to remove dither and a second to interpolate the nonuniform samples to a uniform time grid which involves both addition and multiplication operations.
Guni, Shanta, "A Comparative Study of Sigma Delta and Nonuniform Sampling A/D Converters", Campus Access Master's Thesis, Michigan Technological University, 2016.