Date of Award
2024
Document Type
Open Access Dissertation
Degree Name
Doctor of Philosophy in Computer Science (PhD)
Administrative Home Department
Department of Computer Science
Advisor 1
Soner Onder
Committee Member 1
Zhenlin Wang
Committee Member 2
Jianhui Yue
Committee Member 3
David Whalley
Abstract
Modern superscalar processors dominate the field of computing. While dynamic execution allows for versatility in code, these processors are complex. Statically scheduled code has historically enabled simpler processor designs, but static scheduling cannot account for variables that are unknown at compile time. Furthermore, static scheduling has many inefficiencies, such as the need to insert a large number of nops for code in traditional Very Long Instruction Word (VLIW) processors. In this dissertation, we explore a novel architectural approach for statically scheduled code by breaking the code into several synchronous instruction streams. By representing code in a fundamentally new way, we demonstrate that we can create robust processors that can handle dynamic levels of instruction level parallelism (ILP), and demonstrate the potential it has to target traditional weaknesses typically associated with statically scheduled processors. This dissertation is an exploration of the consequences of allowing for multiple instruction streams, as well as the possibilities opened up by changing program representation to allow for several simultaneous streams of instructions.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Pomerville, Scott K., "STATICALLY CONTROLLED SYNCHRONIZED LANE ARCHITECTURES", Open Access Dissertation, Michigan Technological University, 2024.
https://digitalcommons.mtu.edu/etdr/1811
Included in
Computer and Systems Architecture Commons, Hardware Systems Commons, Programming Languages and Compilers Commons, Systems Architecture Commons