Machine learning for fine-grained hardware prefetcher control
Department of Computer Science
Modern architectures provide hardware memory prefetching capabilities which can be configured at runtime. While hardware prefetching can provide substantial performance improvements for many programs, prefetching can also increase contention for shared resources such as last-level cache and memory bandwidth. In turn, this contention can degrade performance in multi-core workloads. In this paper, we model fine-grained hardware prefetcher control as a contextual bandit, and propose a framework for learning prefetcher control policies which adjust hardware prefetching usage at runtime according to workload performance behavior. We train our policies on profiling data, wherein hardware memory prefetchers are enabled or disabled randomly at regular intervals over the course of a workload's execution. The learned prefetcher control policies provide up to a 4.3% average performance improvement over a set of memory bandwidth intensive workloads.
ICPP 2019 Proceedings of the 48th International Conference on Parallel Processing
Brown, L. E.,
Machine learning for fine-grained hardware prefetcher control.
ICPP 2019 Proceedings of the 48th International Conference on Parallel Processing.
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