Cocktail: Mixing data with different characteristics to reduce Read Reclaims for NAND Flash Memory

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Department of Computer Science


A large number of read-disturb-induced rewrites are performed in the background (a.k.a., Read Reclaim) to alleviate the read-disturb issue in NAND flash memory-based SSDs. Read reclaim (RR) can significantly degrade the performance and shorten the service life of SSD in read-intensive workloads. To address this issue, we propose a novel read-disturb management approach called Cocktail that mixes a small proportion of hot-read pages with a large proportion of cold-read pages, thereby avoiding clustering hot-read pages into a few blocks. Motivated by the insight that read reclaim operations are frequently triggered by hot read-pages, Cocktail first prefills a portion of each block with cold data extracted from user requests. Then, Cocktail fills the prefilled blocks with write-back data caused by read reclaim to create read-balanced blocks. We integrate two thresholds, write pool capacity and the ratio of RR-write data to User-write data, into Cocktail to govern the ratio of write-back data caused by read reclaim to data of user requests in a block. Cocktail dynamically adjusts the two thresholds according to the characteristics of read reclaim. Cocktail is conducive to decentralizing hot write-back data caused by read reclaim across a broad range of blocks, thereby reducing the occurrence of second-time read reclaim and the number of overall block reads. We compare Cocktail with three existing schemes baseline, redFTL, and IPR in terms of SSD service life, SSD response time, write amplification, and the number of GCs under ten real-world workload conditions. Experimental results show that compared with the existing schemes, Cocktail reduces the number of read reclaims, the average response time, the 99-percentile tail latency, and the number of GCs by an average of 40.77%, 10.82%, 5.40%, and 12.29%, respectively. Cocktail also alleviates the write amplification of the three alternative schemes by an average of 49.57%.

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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems