Title

1.2 V single supply CMOS level-up shifter for low energy systems

Document Type

Article

Publication Date

12-1-2017

Department

Department of Electrical and Computer Engineering, Center for Scalable Architectures and Systems

Abstract

Modern mobile system-on-a-chip (SoC) requires multi power supply domains. Therefore, in order to reduce the power consumption of an electronic system and the battery size, a single supply CMOS level-up shifter (yt-ls) for up-converting signals from 0.6 V–1.1 V logic level range up to 1.2 V power supply domain is presented. The circuit has been developed using 65 nm CMOS technology to meet the desirable requirements, such as small size, low power, low static current, and a wide input voltage range for multiple voltage domains. Additionally, to minimize energy consumption, diode connected transistors are employed. From the post-layout simulations, with the power supply voltage of 1.2 V, when a 0.7 V input square wave switching at 500 MHz is applied, the shifter exhibits an output full swing with a propagation delay of only 0.2 ns, an energy consumption of only 0.23 pJ, an energy-delay-product (EDP) 49 pJps, under the output capacitive loading condition of 25 fF. Simulation results demonstrate that the proposed level shifter provides a high robustness against process, voltage and temperature (PVT) variations.

Publication Title

Journal of Low Power Electronics

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