Electromigration-induced failure analysis of VLSI interconnection components
© 1992 IEEE. We have carried out an analysis of the electromigration-induced failure effects in the various VLSI interconnection components using the series model of the failure mechanism. The components include a straight segment, a bend, a step, a via, a multisection interconnection and a power/ground bus. First, by considering the effects of the average flux density and the "bamboo" phenomenon on the grain boundary migration, we have reduced each interconnection component into a series-parallel combination of straight segments. Then, for each of the above mentioned components, we have investigated the dependences of the median-time-to-failure and the lognormal standard deviation of the corresponding failure distributionon the various component parameters. Results can be used for minimizing the interconnection failure due to electromigration.
Midwest Symposium on Circuits and Systems
Electromigration-induced failure analysis of VLSI interconnection components.
Midwest Symposium on Circuits and Systems,
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